Error(175001): The Fitter cannot place 1 SM_SOC_MPFE, which is within Hard Processor System IP agilex_hps_intel_agilex_5_soc_1110_7k65omq - Error(175001): The Fitter cannot place 1 SM_SOC_MPFE, which is within Hard Processor System IP agilex_hps_intel_agilex_5_soc_1110_7k65omq Description Due to a limitation in connectivity between the HPS and the Agilex™ 5 FPGA EMIF IP, you might see the error messages below when enabling FPGA-to-HPS bridge in GSRD in the Agilex™ 5 FPGA E-Series 013B Development Kit . Error(175001): The Fitter cannot place 1 SM_SOC_MPFE, which is within Hard Processor System IP agilex_hps_intel_agilex_5_soc_1110_7k65omq. Info(14596): Information about the failing component(s): Info(175028): The SM_SOC_MPFE name(s): soc_inst|subsys_hps|agilex_hps|intel_agilex_5_soc_inst|sm_mpfe|sundancemesa_mpfe_inst Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: Error(175010): Location failed detailed legality checks (1 location affected) Info(175029): SMSOCMPFE_X61_Y52_N144 Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 SM_SOC_MPFE(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.intel.com/content/www/us/en/support/programmable/kdb-filter.html and search for this specific error message number. Error(175001): The Fitter cannot place 1 SM_SOC_MPFE, which is within Hard Processor System IP agilex_hps_intel_agilex_5_soc_1110_7k65omq. Info(14596): Information about the failing component(s): Info(175028): The SM_SOC_MPFE name(s): soc_inst|subsys_hps|agilex_hps|intel_agilex_5_soc_inst|sm_mpfe|sundancemesa_mpfe_inst Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: Error(175010): Location failed detailed legality checks (1 location affected) Info(175029): SMSOCMPFE_X61_Y52_N144 Resolution To work around this problem in the Agilex™ 5 FPGA E-Series 013B Development Kit , follow these steps: Remove signals and ports related to fpga_button_pio, fpga_led_pio[1] and fpga_reset_n from the top design( legacy_baseline_top.v ). Remove assignments in legacy_baseline.qsf related to ports above. Additional Information The error message is scheduled to be improved with an actual port name in a future release of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15018789352 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.3 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']