Certain Cyclone V Device Pins Unavailable for Bidirectional I/Os in Soft Memory Interfaces - Certain Cyclone V Device Pins Unavailable for Bidirectional I/Os in Soft Memory Interfaces
Description This problem affects DDR2 and DDR3 products. The following Cyclone V device pins cannot be used for bidirectional I/Os, including DQ/DQS signals, for soft memory interfaces: For 5CGXBC9 and 5CGXFC9 devices: AE15 and AE16 for 672 FBGA packages AG19 and AG18 for 896 FBGA packages AL23 and AK23 for 1152 FBGA packages For 5CGXBC7 and 5CGXFC devices: AA18 and Y18 for 672 FBGA packages AG21 and AF20 for 896 packages Resolution There is no workaround for this issue. This issue will be fixed in a future version.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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12.0.2
['Cyclone® V FPGAs and SoCs']
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['novalue'] - 2021-08-25
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