How can I generate the VHDL simulation model for the intr_capturer component in the SoC Golden Hardware Reference Design (GHRD)? - How can I generate the VHDL simulation model for the intr_capturer component in the SoC Golden Hardware Reference Design (GHRD)? Description The Quartus® II software versions 13.0 and 13.0sp1 can generate VHDL models for the Platform Designer system components. However, the VHDL simulation models for the Interrupt Capturer custom component provided with the SoC GHRD cannot be generated. Resolution To work around this problem in the Quartus II software version 13.0 and 13.0sp1, replace the intr_capturer_hw.tcl file in your GHRD project with the following file. intr_capturer_hw.tcl This problem has been fixed in Quartus II software v13.1. Custom Fields values: ['novalue'] Troubleshooting 1408032809 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 13.1 13.0 ['Cyclone® V SE FPGA'] ['novalue'] ['novalue'] ['novalue']