Why am I unable to select a value in the parameter editor for "Mixed Port read-During-Write for Single Input Clock RAM" when targeting MLAB memory type when either the Read Address registers or Output registers are not used? - Why am I unable to select a value in the parameter editor for "Mixed Port read-During-Write for Single Input Clock RAM" when targeting MLAB memory type when either the Read Address registers or Output registers are not used? Description MLAB memory types only support a specific " Mixed Port Read-During-Write for Single Input Clock RAM " value when both the Read Address registers and Output registers are being used. If either of these register stages are disabled then the MLAB memory will default to don't care for Mixed Port Read-During-Write operations. Resolution None Custom Fields values: ['novalue'] Troubleshooting 2205883778 False ['novalue'] ['novalue'] novalue novalue ['Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Stratix® III FPGAs', 'Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']