100GbE IP Core Example Design for Custom Client Interface Variations Cannot Compile - 100GbE IP Core Example Design for Custom Client Interface Variations Cannot Compile Description The example design the Quartus II software v14.1 generates with a 100Gbps, custom client interface variation of the 40-100GbE IP core cannot compile successfully. Resolution To work around this issue, in the < example_design_project_directory > /common/alt_e100_packet_client.v file, replace this line 6’hd : status_readdata <= {16’h0,sync_rx_sernum[95:64]}; with this replacement line 6’hd : status_readdata <= {16’h0,sync_rx-sernum[15:0]}; This issue is fixed in version 14.1 Update 1 of the 40- and 100-Gbps Ethernet MAC and PHY IP core. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 14.1.1 14.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']