Error: test.alt_vip_cl_scl_0.dout/sc_fifo_0.in: Ready latency is 1 for source and 0 for sink. Please insert appropriate adapter for video IP connection. - Error: test.alt_vip_cl_scl_0.dout/sc_fifo_0.in: Ready latency is 1 for source and 0 for sink. Please insert appropriate adapter for video IP connection. Description Due to a change in the Intel® Quartus® Prime Pro Edition software version 19.1, Avalon® streaming adapters are not automatically inserted for Video IP Cores. Resolution This is expected behavior and no workaround is available. User is required to modify connections manually in Platfrom Designer. Custom Fields values: ['novalue'] Troubleshooting 1808693677 False ['Audio and Video'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 19.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']