Found two LVDS low registers instead of one! (ID: 176067) - Found two LVDS low registers instead of one! (ID: 176067) I am using an instance of the ALTLVDS_Rx mega function. When I compile my VHDL, I receive the following error: Error (176067): Found two LVDS low registers instead of one! Error (176066): Found two LVDS high registers instead of one! Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01 Error (171000): Can't fit design in device What does the above error message mean? What is causing it? How do I get around it? UM Replies: Re: Found two LVDS low registers instead of one! (ID: 176067) I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users Replies: Re: Found two LVDS low registers instead of one! (ID: 176067) The matter has been resolved. Evidently Altera does not allow a single LVDS pair to drive two SERDES receivers. When such a thing happens the above listed errors are thrown. Replies: Re: Found two LVDS low registers instead of one! (ID: 176067) ALTLVDS_RX unit used. Signals - RESET, SIG_IN, CLOCK, SIG_VECTOR_OUT. IO ASSIGNMENT: INPUT SIGNAL (SIG_IN) and CLOCK assigned as an LVDS pair using pin planner. Reset is a an asynchronous signal brought in by means of a clock pin/clock network. Replies: Re: Found two LVDS low registers instead of one! (ID: 176067) What are your IP parameters? How are you adding the IP into the design? What are your I/O assignments in the Pin Planner? More detail needed here.