Why are the GTS SDI II IP TX/RX Analog Parameter settings not being reflected in the generated design example? - Why are the GTS SDI II IP TX/RX Analog Parameter settings not being reflected in the generated design example? Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.3 and onwards, the TX/RX Analog Parameter setting values in will remain at their default values instead of reflecting the modified settings when using the GTS SDI II IP Design Example. Resolution To work around this problem when using existing versions of the Quartus® Prime pro software, make the following changes: 1) In the generated Design Example project, open the .IP file at the Project Navigator in the "IP Components" tab: For TX: ../rtl/tx/sdi_tx.ip For RX: ../rtl/rx/sdi_rx.ip 2) Update the desired Analog Parameter values in the IP Parameter Editor GUI. 3) Save the parameter settings. 4) Generate HDL to overwrite the .IP file. 5) Close the GUI after generating the HDL. The new values will be updated. This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15017850019 False ['SDI II IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 24.3 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']