Is there an issue with Configuration via Protocol (CvP) when configuring using CvP with truncated or corrupted periphery/core bitstream in Intel Agilex™ 7 FPGA devices? - Is there an issue with Configuration via Protocol (CvP) when configuring using CvP with truncated or corrupted periphery/core bitstream in Intel Agilex™ 7 FPGA devices? Description In the Quartus® Prime Pro Edition Software version 21.2 and below, performing CvP configuration can cause the Agilex™ 7 FPGA devices to hang if a truncated or corrupted periphery/core bitstream is sent. Once the FPGA hangs due to receiving a truncated or corrupted periphery/core bitstream, subsequent reconfiguration via CvP Initialization Mode/CvP Update mode cannot be performed. Resolution This problem is already fixed in Quartus® Prime Pro Edition Software version 22.2. Custom Fields values: ['novalue'] Troubleshooting 1509151525 , 1509150276 , 1509151479 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.2 21.2 ['Agilex™ 7 FPGA F-Series', 'Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']