Stratix V Hard IP for PCI Express IP Core Gen2 Variants May Downtrain in 12.0 SP1 - Stratix V Hard IP for PCI Express IP Core Gen2 Variants May Downtrain in 12.0 SP1 Description Stratix V Hard IP for PCI Express IP Core Gen2 variants may downtrain in release 12.0 SP1 of the Quartus II software. This issue is caused by an incorrect PLL setting. Resolution This issue is fixed in version 13.0 of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 13.0 12.0.1 ['Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']