Why does AS_CLK not operate at 80 MHz when using Intel® Stratix® 10 devices? - Why does AS_CLK not operate at 80 MHz when using Intel® Stratix® 10 devices? Description Due to a known problem in the Intel® Quartus® Prime Pro Edition software version 19.4 and earlier, the Intel® Stratix® 10 device Active Serial configuration clock (AS_CLK) will run at 100 MHz during configuration even when you set AS_CLK to operate at 80 MHz. Resolution This problem is fixed starting with Intel Quartus Prime Pro Edition software version 20.2 Custom Fields values: ['novalue'] Troubleshooting 1506961575 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.2 19.3 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']