How long does the transceiver on-chip termination calibration process take for Stratix IV GX/T and Arria II GX/Z devices? - How long does the transceiver on-chip termination calibration process take for Stratix IV GX/T and Arria II GX/Z devices? Description The transceiver on-chip termination calibration process takes 33,000 cal_blk_clk cycles from the de-assertion of the cal_blk_powerdown signal on Stratix® IV GX/T and Arria® II GX/Z devices. This time period applies to calibration blocks that control either one, or multiple transceiver blocks. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']