System Level Verification & Hardware/Software Co-Simulation - This advanced course tackles the unique and technically demanding challenges that arise when an ARM Cortex A9/A53 Hard Processor System must be co-verified alongside custom programmable logic fabric… FPGA Authority is an Altera® certified trainer that provides in-depth, technically detailed instruction covering the complete FPGA and SoC design process. Training spans RTL hardware design, embedded… Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 Bare Die Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® 10 GX FPGA Cyclone® 10 LP FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA HardCopy™ II ASIC Devices HardCopy™ III ASIC Devices MAX® 10 FPGA Mustang Mesa Stratix® 10 AX FPGA Stratix® 10 Bare Die Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® IV GX FPGA An advanced, hands on course designed to bridge the gap between hardware, firmware, and software validation. Participants dive into a powerful co-simulation ecosystem that integrates RTL, transaction level modeling, and QEMU based emulation to replicate real world system behavior with precision. From AXI bus functional models and UVM based testbenches to HPS boot flows and Linux bring up, this course equips engineers with the methodology and tools needed to verify complex SoC interactions early and efficiently, reducing debug cycles and accelerating time to market. Designed for engineers working on high performance FPGA systems, the training emphasizes scalable verification strategies, including constrained random stimulus, coverage driven planning, formal property verification, and robust scoreboard architectures. You’ll learn to model, simulate, and analyze HPS FPGA interfaces with confidence, ensuring protocol compliance, data integrity, and system level correctness across the entire design stack. With a strong focus on industry standard workflows and practical tool usage. It delivers a comprehensive, production-ready skill set that empowers teams to tackle even the most demanding verification challenges in embedded and heterogeneous SoC environments. Access Aerospace ASIC Proto Broadcast Consumer Data Center Cloud (Public, Private, Hybrid) Data Center OEM (IHV, ISV, SI, VAR) Defense Government Industrial Medical Test Transportation Wireless System Level Verification & Hardware/Software Co-Simulation Key Features Offering Brief No No No No Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 Bare Die Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® 10 GX FPGA Cyclone® 10 LP FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA HardCopy™ II ASIC Devices HardCopy™ III ASIC Devices MAX® 10 FPGA Mustang Mesa Stratix® 10 AX FPGA Stratix® 10 Bare Die Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® IV GX FPGA 2 Days No No English Offering Brief Production Windows,Linux a1JUi000009jmUjMAI Participants should already have a solid foundation in FPGA architecture and digital logic, plus working knowledge of SystemVerilog (including interfaces and object‑oriented constructs) and basic UVM concepts. Experienced FPGA and verification engineers, SoC designers, embedded software developers, and system architects What's Included PDF of slides, lab manual and lab files where applicable Ordering Information System Level Verification & Hardware/Software Co-Simulation a1JUi000009jmUjMAI Production EDA Tools / IDE Education / Training a1MUi00000GbNhBMAV a1MUi00000GbNhBMAV Member 2026-07-24T17:33:40.000+0000 This advanced course tackles the unique and technically demanding challenges that arise when an ARM Cortex A9/A53 Hard Processor System must be co-verified alongside custom programmable logic fabric connected through high bandwidth AXI bridge interfaces. Partner Solutions