Can the Hard IP for PCI Express initiate PCI Express loopback? - Can the Hard IP for PCI Express initiate PCI Express loopback? Description Only Root Port configurations of the Altera® Hard IP for PCI Express® support loopback mastering. Endpoint configurations support loopback slave entry. Resolution To initiate PCI Express loopback mastering when configured as a Root Port, set the hip_ctrl_test_in to 32\'hAA. For normal operation set hip_ctrl_test_in to 32\'hA8. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']