Why doesn’t the rx_ready signal status go high when dynamic reconfiguration from high speeds (>6G) to low speeds (<=6G) is performed in the CPRI Multirate Design Example? - Why doesn’t the rx_ready signal status go high when dynamic reconfiguration from high speeds (>6G) to low speeds (<=6G) is performed in the CPRI Multirate Design Example? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3, the rx_ready status signal will not go high in the CPRI Multirate Design Example when dynamically reconfiguring from high speeds (>6G) to low speeds (<=6G). Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 when you are dynamically reconfiguring the CPRI rate from the high-speed variant (>6G) to the low-speed variant (<=6G), follow the steps below. Download the workaround script “ ftile-cpri-dr-test.tcl ” Navigate to <your_example_design_directory>/hardware_test_design/hwtest/ Replace the file “ftile_cpri_dr_test.tcl” with the downloaded file. The major changes in the workaround script are the two FGT Attribute Access commands asserted in 6Gbps and below CPRI rates: CPI_assert_req 0 $RESET_LANE($lane_number) CPI_assert_req 0 $SET_MODE_BYPASS($lane_number) This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 22.4. Custom Fields values: ['novalue'] Troubleshooting 15011772691, 15011647196 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.4 22.3 ['Agilex™ 7 FPGA F-Series', 'Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']