Why is there a 1-bit error in the Intel® Stratix® 10 H-Tile Eye Viewer when DFE is enabled? - Why is there a 1-bit error in the Intel® Stratix® 10 H-Tile Eye Viewer when DFE is enabled? Description Due to a problem with the error counter inside the Intel® Stratix® 10 H-Tile Eye Viewer, it may report an incorrect 1-bit error when the DFE is enabled. Resolution If you are using the transceiver toolkit in Intel® Quartus® Prime Pro Edition Software version 17.1, it will perform automatic correction for the incorrect error count. If you are reading the error count value through the Avalon-MM interface with DFE enabled, you should manually subtract the reported error count value by 1 when the reported error count is greater than 0. Custom Fields values: ['novalue'] Troubleshooting FB: 454517; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix No plan to fix ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']