Why does the EMIF or HPS EMIF calibration fail when sharing the IO Bank with the MIPI D-PHY IP？ - Why does the EMIF or HPS EMIF calibration fail when sharing the IO Bank with the MIPI D-PHY IP？ Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.1, you may observe Fabric EMIF calibration failure or HPS EMIF calibration failure when the Fabric EMIF or HPS EMIF is sharing the same IO Bank with MIPI D-PHY IP. This problem does not impact the DDR4 and DDR5 HPS EMIF implementation that is sharing only the RZQ pin with the MIPI D-PHY IP. Resolution This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Software. Custom Fields values: ['novalue'] Troubleshooting 15017948658 False ['EMIF Memory Device Description IP (DDR4)'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 25.1 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']