If your design includes a D flipflop (DFF), the Design Assistant issues an error for MAX and MAX V - If your design includes a D flipflop (DFF), the Design Assistant issues an error for MAX and MAX V Description If your design includes a D flipflop (DFF), the Design Assistant issues an error similar to the following:Internal Error: Sub-system: DRC, File: /quartus/tsm/drc/drc_tdb_netx.cpp, Line: 6270 Resolution Turn off the Design Assistant; on the Design Assistant page of the Settings dialog box, turn off Run Design Assistant during compilation . Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 10.1 10.1 ['MAX® V CPLDs'] ['novalue'] ['novalue'] ['novalue']