Why does the Native PHY IP core create the port "rx_pma_qpipullup" created when I enable "rx_qpi_pmapulldn"? - Why does the Native PHY IP core create the port "rx_pma_qpipullup" created when I enable "rx_qpi_pmapulldn"? Description Due to a problem in the Quartus® II software version 13.1 Arria®10 edition and later, the "rx_pma_qpipulldn" port is erroneously named "rx_pma_qpi_pullup" on the module declaration. Resolution Even though the port is erroneously named, it functions as intended as "rx_pma_qpipulldn". Users should treat the "rx_pma_qpi_pullup" port as "rx_pma_qpipulldn". This problem is fixed beginning with the Quartus II software version 14.1 Update 1. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.1a10 ['Arria® 10 FPGAs and SoCs', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']