Why do I see the rx_control doesn't work correctly when instantiating the Transceiver Native PHY Intel® Arria® 10/Intel® Cyclone®10 GX FPGA IP as more than one channel with "Enable simplified data interface" option enabled? - Why do I see the rx_control doesn't work correctly when instantiating the Transceiver Native PHY Intel® Arria® 10/Intel® Cyclone®10 GX FPGA IP as more than one channel with "Enable simplified data interface" option enabled? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.2 and earlier, the outputs of rx_control are not correct when using the Transceiver Native PHY Intel® Arria® 10/Intel® Cyclone®10GX FPGA IP in enhanced basic mode with more than 1 channel and “Enable simplified data interface” enabled. Only the rx_control of channel 0 is right. Resolution This problem is fixed in the Intel® Quartus® Prime Pro Edition Software version 23.3. Custom Fields values: ['novalue'] Troubleshooting 15010262783 False ['Transceiver Native PHY Arria® 10 Cyclone® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.3 21.2 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA'] ['novalue'] ['novalue'] ['novalue']