10GBASE-R PHY FPGA IP - The 10GBASE-R PHY FPGA Intellectual Property (IP) core can be used with either Altera FPGA IP for 10G Ethernet MAC or with a customer-developed Ethernet MAC via a standard XGMII interface running at… Altera, provides leadership programmable solutions that are easy-to-use and deploy in applications from the cloud to the edge, offering limitless AI possibilities. Our end-to-end broad portfolio of… Arria® V GT FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Stratix® V GS FPGA Stratix® V GX FPGA The 10GBASE-R PHY FPGA Intellectual Property (IP) core can be used with either Altera FPGA IP for 10G Ethernet MAC or with a customer-developed Ethernet MAC via a standard XGMII interface running at 156.25 Mbps. The 10GBASE-R PHY FPGA Intellectual Property (IP) core allows connectivity directly with any XFP or SFP+ optical module or with any external device with XFI and SFI interfaces. ASIC Proto Broadcast 10GBASE-R PHY FPGA IP Key Features PHY consisting of 10GBASE-R physical coding sublayer (PCS), 10.3125-Gbps physical medium attachment (PMA), and PHY management functions; Direct interface with 10GE MAC for a complete single-chip solution Offering Brief No No No Yes Encrypted Verilog Arria® V GT FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Stratix® V GS FPGA Stratix® V GX FPGA Yes Yes Offering Brief Production a1JUi0000049UUrMAM What's Included Encrypted Verilog source file Ordering Information IP-10GMRPHY (Arria 10 and Cyclone 10); IP-10GBASERPCS (Cyclone V); IP-10GETHMAC (10-Gbps Ethernet MA Digikey Mouser a1JUi0000049UUrMAM Production Intellectual Property (IP) a1MUi00000BO8twMAD a1MUi00000BO8twMAD 2025-08-12T16:59:27.000+0000 The 10GBASE-R PHY FPGA Intellectual Property (IP) core can be used with either Altera FPGA IP for 10G Ethernet MAC or with a customer-developed Ethernet MAC via a standard XGMII interface running at 156.25 Mbps. Altera Solutions