Why does an underflow error occur on the transmitter path for the F-Tile Interlaken Intel® FPGA IP with a single segment design? - Why does an underflow error occur on the transmitter path for the F-Tile Interlaken Intel® FPGA IP with a single segment design? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, you might see itx_underflow asserted in an F-Tile Interlaken Intel® FPGA IP single-segment design. It will cause the Physical Medium Attachment (PMA) to lose lock. Resolution When the error occurs, you need to reset both the F-Tile Interlaken Intel® FPGA IP and the transceiver to re-establish the link. This problem has been fixed in the Intel® Quartus® Prime Pro Edition Software version 22.4. Custom Fields values: ['novalue'] Errata 15012065379 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.4 22.3 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']