N-EMB-120 OSCAR EtherCAT Master_Slave - The N-EMB-120 is a high-performance industrial platform featuring MAX®10 FPGAs. MAX 10 has a built-in sufficient RAM capacity, and since you can use FLASH for both config ROM and ROM, you can realize… NDR boasts over 40 years of experience in embedded development, offering established technology essential for industrial systems, including FPGA design, circuit design, and OS porting.The Embedded… MAX® 10 FPGA The N-EMB-120 Platform is a platform primarily developed for the industrial Ethernet field. Equipped with MAX® 10 10M50: With sufficient RAM capacity and FLASH usable as configuration ROM, a custom CPU can be implemented on a single chip by using Nios II. Equipped with external SDRAM and QSPI Flash: Expansion is also possible according to the software application capacity. Since the FPGA is equipped with two 10/100 PHYs, network-enabled devices can be easily realized by using Altera's TSE MAC, etc. Industrial N-EMB-120 OSCAR EtherCAT Master_Slave Key Features Supports EtherCAT Master/Slave Functionality for Simplified Industrial Network Construction. Offering Brief No Expansion: 2 x 100-pin 1.27mm pitch staggered connectors No No No MAX® 10 FPGA No SDRAM: 32 MByte (x16-bit), Max 167MHz - No Fast Ethernet: 2 x 10/100 Mbps Ethernet ports on the FPGA side GPIO: 81 channels available for the FPGA section via expansion connectors 17.1.0 Offering Brief Production a1JUi0000049UKZMA2 Input Voltage: 5.0V DC User: 2 x Green LEDs / Rotary Switches: 2 x Decimal rotary switches What's Included Schematics Ordering Information N-EMB-120 a1JUi0000049UKZMA2 Production Boards / SOMs / Dev Kits a1MUi00000BO8slMAD a1MUi00000BO8slMAD Select 2026-05-27T00:08:47.000+0000 The N-EMB-120 is a high-performance industrial platform featuring MAX®10 FPGAs. MAX 10 has a built-in sufficient RAM capacity, and since you can use FLASH for both config ROM and ROM, you can realize a custom CPU with one chip by using Nios® II. It is equipped with external SDRAM (32MByte x 16bit) and QSPI FLASH (521Mbit), but it can also be expanded according to the software application capacity. Since two 10/100 PHYs are installed on the FPGA side, it is possible to use Altera's TSEMAC IP. The board can be used in a variety of EtherCAT (hardware master and slave) applications. Hardware master: It is possible to evaluate our hardware master. It was developed as a retrofit to the existing CPU board to realize "Instant EtherCAT". Slave: It can also be used as a slave by mounting BECKHOFF's EtherCAT slave IP on the Ethernet on the FPGA side. Partner Solutions