Why does reading or writing across the FPGA-to-HPS Bridge in the Agilex™ 5 FPGA devices fail? - Why does reading or writing across the FPGA-to-HPS Bridge in the Agilex™ 5 FPGA devices fail? Description The Agilex™ 5 FPGA devices' FPGA-to-HPS Bridge (F2H) hardware currently supports AXI5, ACE-lite, and AXI4. However, some signals are not tied off appropriately, resulting in unsuccessful transactions. Resolution To work around this problem, use the Quartus® Prime Pro Edition Software version 24.1 and install the patches below, which will configure the appropriate AXI signals to allow successful transactions across the F2H bridge. Quartus® Prime Pro Edition Software v24.1 Patch 0.08 for Windows (.exe) Quartus® Prime Pro Edition Software v24.1 Patch 0.08 for Linux (.run) Readme for Quartus® Prime Pro Edition Software v24.1 Patch 0.08 (.txt) Custom Fields values: ['novalue'] Troubleshooting 15015307934 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.2 24.1 ['Agilex™ 5 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']