Internal Error: Sub-system: HSSI, File: /quartus/periph/hssi/hssi_logical_physical_mapping.cpp, Line: 562 - Internal Error: Sub-system: HSSI, File: /quartus/periph/hssi/hssi_logical_physical_mapping.cpp, Line: 562 Description Due to a problem in the Quartus® II software version 13.1 and earlier, you may see this error if your Arria® V design includes the Altera® Serial Digital Interface (SDI) II Megacore® IP. The error occurs when Tx PLL Dynamic Switching is enabled and xcvr_refclk and xcvr_refclk_alt are driven by the same clock source. Resolution To work around this problem, ensure that xcvr_refclk and xcvr_refclk_alt are driven by different sources. Future versions of the Quartus II software are scheduled to support xcvr_refclk and xcvr_refclk_alt being driven by the same source. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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