Why are the Eye Width measurements of the Debug Toolkit for PCIe Gen4 designs of the F-Tile Avalon® Streaming IP for PCI Express* smaller than expected? - Why are the Eye Width measurements of the Debug Toolkit for PCIe Gen4 designs of the F-Tile Avalon® Streaming IP for PCI Express* smaller than expected? Description Due to a problem in the Quartus® Prime Pro Edition software version 24.3.1 and earlier, the Eye Width measurements reported by the Debug Toolkit for PCIe* Gen4 designs of the F-Tile Avalon® Streaming IP for PCI Express* are incorrect. Resolution This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.1. Custom Fields values: ['novalue'] Troubleshooting 15017302674 False ['F-Tile Avalon-ST for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 25.1 24.2 ['Agilex™ 7 FPGAs and SoCs', 'Agilex™ 9 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue'] - 2025-03-31

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