Internal Error: Sub-system: MEM, File: /quartus/ccl/mem/mem_segment.cpp, Line: 766 - Internal Error: Sub-system: MEM, File: /quartus/ccl/mem/mem_segment.cpp, Line: 766 Description Due to a problem in the Quartus® II software version 11.0 SP1, this error may be seen during Analysis & Synthesis when you compile a design targeting a Stratix® IV GX device. Resolution To work around, turn off timing-driven synthesis by following these steps: Open the Settings dialog box by selecting Settings on the Quartus II Assignments menu. Select the categor Analysis & Synthesis Settings Turn off the option Timing-Driven Synthesis in the Analysis & Synthesis Settings page This problem is scheduled to be fixed in a future version of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.0.1 ['Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA'] ['novalue'] ['novalue'] ['novalue']