SOPC Builder and Qsys Do Not Support Full-Rate DDR with HPC I in Simulation - SOPC Builder and Qsys Do Not Support Full-Rate DDR with HPC I in Simulation Description SOPC Builder and Qsys do not support full-rate DDR designs using the high-performance controller (HPC I) in simulation. DDR2 designs are supported. This issue affects all full-rate DDR designs with the high-performance controller (HPC), generated with SOPC Builder or with Qsys. The design fails during calibration. Resolution There is no workaround for this issue. This issue will not be fixed. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']