Have the Arria 10 device timing models for input paths with calibrated I/O standards been changed since the release of the Quartus Prime software version 16.1 Update 1? - Have the Arria 10 device timing models for input paths with calibrated I/O standards been changed since the release of the Quartus Prime software version 16.1 Update 1? Description Yes, since the release of the Quartus® Prime software version 16.1 Update 1 the timing models for the I/O input paths have been updated for Arria® 10 devices. This affects designs that use input pins with calibrated I/O standards and either 40, 50 or 60 ohm input termination. 3V I/Os are not impacted because they do not support calibrated terminations. Resolution If design uses the affected I/O configrations, rerun the TimeQuest Timing Analyzer on the Quartus Prime software version 16.1 Update 2 or later. For External Memory Interface (EMIF) IP, regeneration of IP is required. If there are timing violations, run the Fitter in the Quartus Prime software version 16.1 Update 2 or later to close timing on the design. Custom Fields values: ['novalue'] Troubleshooting FB: 411429; False ['I O'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 16.1.2 16.0 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']