Arria 10 - DDR4 EMIF write not responding - [Solved : debounced button input] - Arria 10 - DDR4 EMIF write not responding - [Solved : debounced button input] Hello community, I am using Terasic HAN Pilot development board based on Arria 10 device. I try to write to DDR4 memory embedded on the board which is actually called "DDR4B" , this is a 8Gb x32, and I am able to perform read/writes to DDR4 from EMIF through avalon memory mapped (amm) burst interface with reference designs provided by Terasic with the board. I want to make my own project to perform read/writes to this DDR4B memory with Intel EMIF IP and customized amm controller. The simple issue is that asserting a write command to the EMIF doesn't trigger any waitrequest_n signal back (also called "ready" signal by EMIF). Just to assure you, I put the exact same EMIF parameters provided by reference designs. Here is the signaltap output when I assert a write command along with other signals like address, burstcount (8), byteenable : And if I try to read after asserting the write command, the EMIF seems stalled and I have no readdatavalid. While if I directly read after a reset, I can properly read. So the write command is "seen" by EMIF but doesn't behaves properly ! Any insight is welcome because I understand that the amm control process is trivial. Thanks Replies: Re: Arria 10 - DDR4 EMIF write not responding - [Solved : debounced button input] I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you. Replies: Re: Arria 10 - DDR4 EMIF write not responding - [Solved : debounced button input] Problem solved, right when I ask for support sorry... That was coming from the button input which triggers start of write. This button is bouncing and proceeding multiple writes, so I needed to debounce it.