Why does the HDMI Intel® FPGA IP HDMI 2.1 design example encounter no video output failure? - Why does the HDMI Intel® FPGA IP HDMI 2.1 design example encounter no video output failure? Description Due to a problem starting in version 20.3 of the Intel® Quartus® Prime Pro software, HDMI Intel® FPGA IP HDMI 2.1 design example may encounter no video output failure in the two scenarios detailed below. Switching from Non-Passthrough to Passthrough option in TMDS mode. Switching from FRL mode to TMDS mode. Resolution This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 21.2. Custom Fields values: ['novalue'] Troubleshooting 1508933934 True ['HDMI IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 21.2 20.3 ['Arria® 10 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']