Why is the number of DSP block 9-bit elements shown as "N/A until Partition Merge" even after the design is fully compiled? - Why is the number of DSP block 9-bit elements shown as "N/A until Partition Merge" even after the design is fully compiled? Description In the Quartus® II software version 10.0, the Flow Summary report shows the line DSP block 9-bit elements as N/A until Partition Merge even after the design is fully compiled, when you target Stratix® V devices. DSP block usage is not displayed because Stratix V devices do not have DSP 9-bit elements. You can check the DSP block usage in the line DSP Blocks of the Flow Summary report. This problem is scheduled to be fixed in a future version of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']