Why does a design for Intel® Stratix® 10 device fail to access an EPCQ-L when the design is generated with Intel® Quartus® Prime Pro Edition Software version 21.1 or later? - Why does a design for Intel® Stratix® 10 device fail to access an EPCQ-L when the design is generated with Intel® Quartus® Prime Pro Edition Software version 21.1 or later? Description Starting with Intel® Quartus® Prime Pro Edition Software version 21.1, the secure device manager (SDM) in Intel® Stratix® 10 no longer supports the EPCQ-L device. When a design for Intel® Stratix® 10 device is generated with Intel® Quartus® Prime Pro Edition Software version 21.1 or later, the design fails to access an EPCQ-L device using the Mailbox Client Intel® FPGA IP, the Serial Flash Mailbox Client Intel® FPGA IP, the SDM Debug Toolkit, and the Configuration Debugger tool. Resolution Use Intel® Quartus® Prime Pro Edition Software version 20.4 or earlier to generate a design for Intel® Stratix® 10 device, when the design accesses an EPCQ-L device using the Mailbox Client Intel® FPGA IP, the Serial Flash Mailbox Client Intel® FPGA IP, the SDM Debug Toolkit, and the Configuration Debugger tool. Related Articles Why does programming of EPCQ-L configuration devices fail when using Intel® Quartus® Prime Programmer Pro Edition Software version 21.1 and later? Custom Fields values: ['novalue'] Troubleshooting 14017432401 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 21.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['Configuration Device EPCQ-L'] ['novalue']