Serial Digital Interface II Setup Time Violation on pif_interface_sel at reconfig_clk Domain - Serial Digital Interface II Setup Time Violation on pif_interface_sel at reconfig_clk Domain Description A setup time violation may occur on the pif_interface_sel register to other paths at the reconfig_clk domain when instantiating the Transceiver Reconfiguration Controller. This issue affects all devices supported by the serial digital interface (SDI) II in 12.1sp1. Resolution There is no workaround for this issue. This issue will be fixed in a future ACDS release. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.1.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']