altera_xcvr_custom:phy_inst|av_xcvr_custom_nr:A5|*|avmm_interface_insts[0].av_hssi_avmm_interface_inst~BURIED_ASYNC_DATA_OUT - altera_xcvr_custom:phy_inst|av_xcvr_custom_nr:A5|*|avmm_interface_insts[0].av_hssi_avmm_interface_inst~BURIED_ASYNC_DATA_OUT
Description You may see the following TimeQuest unconstrained clock when using the Arria® V device transceiver Custom PHY in Quartus® II software version 13.0 and later. "*|altera_xcvr_custom:phy_inst|av_xcvr_custom_nr:A5|av_xcvr_custom_native:transceiver_core|av_xcvr_native:gen.av_xcvr_native_insts[0].gen_bonded_group.av_xcvr_native_inst|av_xcvr_avmm:inst_av_xcvr_avmm|avmm_interface_insts[0].av_hssi_avmm_interface_inst~BURIED_ASYNC_DATA_OUT" Resolution It is safe to ignore this unconstrained clock in the Quartus II software.
Custom Fields values:
['novalue']
Troubleshooting
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False
['novalue']
['FPGA Dev Tools Quartus II Software']
novalue
12.0
['Arria® V FPGAs and SoCs', 'Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA']
['novalue']
['novalue']
['novalue'] - 2021-08-25
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