You May Encounter Difficulty Achieving Timing Closure for QDR-IV Interfaces on Arria 10 Devices - You May Encounter Difficulty Achieving Timing Closure for QDR-IV Interfaces on Arria 10 Devices Description You may encounter difficulty in achieving timing closure for QDR-IV interfaces on Arria 10 devices. Resolution The workaround for this issue is to run multiple seeds to achieve timing closure. This problem will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 15.1 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']