Error: add_fileset_file: No such file <Quartus_Installation_Directory>/0002_pcie_s10_hip_ast_0_gen/ip/pcie_example_design/pcie_example_design_DUT/altera_xcvr_fpll_s10_htile_181/sim/docs/pcie_example_design_DUT_altera_xcvr_fpll_s10_htile_181_rrbjwya - Error: add_fileset_file: No such file <Quartus_Installation_Directory>/0002_pcie_s10_hip_ast_0_gen/ip/pcie_example_design/pcie_example_design_DUT/altera_xcvr_fpll_s10_htile_181/sim/docs/pcie_example_design_DUT_altera_xcvr_fpll_s10_htile_181_rrbjwya Description Due to a problem in the Stratix® 10 Avalon -ST and Single Root I/O Virtualization (SR-IOV) Interface for PCI Express* version 18.1, you may observe this error when generating the design example in Windows* OS. Error: add_fileset_file: No such file <Quartus_Installation_Directory>/0002_pcie_s10_hip_ast_0_gen/ip/pcie_example_design/pcie_example_design_DUT/altera_xcvr_fpll_s10_htile_181/sim/docs/pcie_example_design_DUT_altera_xcvr_fpll_s10_htile_181_rrbjwya_parameters.csv/pcie_example_design_DUT_altera_xcvr_fpll_s10_htile_181_rrbjwya_parameters.csv Resolution To work around this problem, generate the example design in Linux OS. Custom Fields values: ['novalue'] Troubleshooting FB: 2205700193; False ['Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 18.1 ['Stratix® 10 GX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 SX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']