about Internal Weak Pull-Up(cyclone10LP) - about Internal Weak Pull-Up(cyclone10LP) Hello, Tell me about the Internal Weak Pull-Up of cyclone10LP. For before and during configuration, is weak pull-up enabled regardless of the weak pull-up resistor setting? best regard Goto Replies: Re: about Internal Weak Pull-Up(cyclone10LP) I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you. Replies: Re: about Internal Weak Pull-Up(cyclone10LP) Hi, Yes, that's true. Regards, Aiman Replies: Re: about Internal Weak Pull-Up(cyclone10LP) Hello, Thank you for your answer to me. I checked Table 11 on page 13 of the Cyclone10LP Device Database. Is the weak pull-up resistor as follows? When the weak pull-up resistor is set to ON, the pull-up resistor is inserted before and during configuration, and in user mode. When the weak pull-up resistor is set to OFF, the pull-up resistor does not enter (that is, high impedance) before and during configuration, and in all user modes. best regards, Goto Replies: Re: about Internal Weak Pull-Up(cyclone10LP) Hi, Thank you for contacting Intel community. Please explain further on your question, or you can also refer to below link: For Cyclone 10 LP Kindly refer to Cyclone 10 LP datasheet below: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10lp-51002.pdf (page 13, Table 11) Pin connection guidelines for Cyclone 10 LP: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/cyclone-10/pcg-01021.pdf Cyclone 10 LP device design guidelines: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an800.pdf Regards, Aiman