NiosII booting from on-chip memory SPI issue - NiosII booting from on-chip memory SPI issue Hi all, I am using quartus prime 19.1 lite, and I am trying to load a simple SPI program that sends SPI commands using NIOS II processor. The board that I am using is DECA Max10 Development Board. I am able to send "$HELLOABC*" continuously when I load the program in NIOS II SDK debug mode. The problem comes when I try to generate the .hex file using "mem_init_generate" and compile the project in quartus to generate the .pof file. The .pof file that I loaded inside my FPGA is unable to send the "$HELLOABC*" continously. It only sends 2 "$HELLOABC*" and stops abruptly (as attached in spi_output.PNG ) I have tried to load a simple led and switch program that basically turns on and off an LED, and I am able to burn it into the FPGA. So I am assuming that my steps to load the .pof file containing the NIOS II application code is correct. Hence, if anyone can enlighten me about why is this happening to my SPI program? Below attached is the hardware of my SPI program, Nios II Application Code and spi_output image from a external logic analyzer. I am using the test code given by Altera SPI Core in the link below. https://www.intel.com/content/www/us/en/docs/programmable/683130/23-4/example-test-code.html While editing it to include a while loop to send the data continuously. I have excluded the ISR to avoid any other issues. Thanks in Advance, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi all, Just an update to this issue. The problem has been resolved by disabling the alt_printf statement in my C code. My .pof works now, and it can send the spi commands after power cycling the board. My guess is that as there is no communication between the board and the nios2 terminal, the alt_printf pointer got lost when executing the function. Hence when loading .pof, all alt_printf must be disabled. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘ https://supporttickets.intel.com’ , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Is there any new update on this issue? Replies: Re: NiosII booting from on-chip memory SPI issue Hi, We are still debugging on the design, sorry for the delay. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Please find the attached file. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, From our communication on email, you can reply the file below this. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Reuben, Thank you for the test. We are preparing for the virtual meeting. Will let you know in the email. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Thanks for your file. I have loaded the .sof file from the ready to test folder, and changed the bsp settings as per your steps. However, I do not see print outs on Nios II console(as attached). Any updates on the virtual meeting mentioned in your email? I think it could be better if we have a call and settle this issue. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Below I attached the screenshot of our step along with the file that you can use. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Below I will attached our screenshot on how we run the NiosII application from our side. By the way during our investigation, there is times when the output terminal on SBT did not show anything. We figure it out that the .sof is being compiled to be used to monitor the signal tap. Then we tried using other .sof file which is inside the "ready to test folder" and it working back which is there is output on the SBT. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, 1 . Does NiosII output prints using .pof continuos or stopped after 53 lines as well? Can check this from the terminal in Nios II SBT. After programming the .sof (the file that you run earlier which give 53 line of output), run as hardware in SBT, and uncheck the .elf I did the steps above but I do not get any output in the terminal in Nios II SBT. I uncheck the Download ELF to selected target system(as attached) Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Below is the output from the terminal that I copy paste into text file. Are we getting the same output? Replies: Re: NiosII booting from on-chip memory SPI issue Hi, We want to check on these things again. 1 . Does NiosII output prints using .pof continuos or stopped after 53 lines as well? Can check this from the terminal in Nios II SBT. After programming the .sof (the file that you run earlier which give 53 line of output), run as hardware in SBT, and uncheck the .elf. 2 . If above is true, can you try to perform test with the simple normal hello world prints and see if that can continue. Need to get information on this too. Below this reply, we will post screenshot of our output prints that loops continuously. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, I will email you on the email registered for this account. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, I have tried it and I get the same result on the spi, 2 "$HELLOABC*$" and stops. With regards to your above question, here are my reply. Would like to ask you to check on few things. If running .pof file, does it always stop at 53rd line? Does NiosII output prints using .pof continuos or stopped after 53 lines as well? If above is true, can you try to perform test with the simple normal hello world prints and see if that can continue. 1. Yes it always stop at 53rd line. 2. I did not check the output prints using .pof, how to check it? Is it by connecting to COM port in a console terminal? 3. Sure I will try this. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Thank you. Will wait for your feedback. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Yes I am using proj.qsys. Noted I will try "Single Uncompressed Image with memory initialization" Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, For the design I want to reconfirm that you are using proj.qsys not proj_qsys.qsys. For the settings, I think we faced the same issue before we did not choose with memory initialization in quartus. On platform designer Onchip flash = choose "single uncompressed image with memory initialization " and uncheck initialize flash Memory = check initialize and enable non-default On Device and Pin Options - configuration mode Select " Single Uncompressed Image with memory initialization " Thank you. Regards, Fathulnaim Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, I am encountering this error "Error (16031): Current Internal Configuration mode does not support memory initialization or ROM. Select Internal Configuration mode with ERAM." during compilation. These are the steps I took. 1) Open the same proj.qsys file that you have given to me. On the On-Chip Flash IP, select "Single Uncompressed Image" and uncheck initialize flash content. On the On-Chip Memory IP, uncheck initialize memory content. (If I check this, I will have another error "Error (14703): Invalid internal configuration mode for design with memory initialization" during compilation. So I intend to uncheck first, after I generate the hex file, I will check it and check enable non-default initialization file.) 2)Generate proj.qsys and in Quartus, under Assignments -> Device -> Device and Pin Options -> Configuration Mode, select Single Uncompressed Image. Compile project 3)Open Nios II Eclipse, and create new NIOS II application and BSP template. Build the project. Edit the makefile to remove the errors generating elf. Build the project again, and import source code. 4)Load the .sof file using quartus and then run Nios II Hardware Configuration in debug mode to load .elf file. Ensure that Tx and Rx is blinking continuously and able to receive SPI signals continuously. 5)Generate .hex file by running mem_init_generate using Nios II Eclipse. 6)Reopen proj.qsys file in system designer of Quartus, and on the On-Chip Memory IP check initialize memory content and check non-default initialization file. Under User created initialization file: point to the new location of the .hex file in the mem_init folder. 7)Compile project in Quartus and I receive the error "Error (16031): Current Internal Configuration mode does not support memory initialization or ROM. Select Internal Configuration mode with ERAM." Please advice whether is there anything wrong with my steps. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Noted on the changes. Let me update you on the checks again. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Do you have any updates to share about this issue? Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Thank you for the feedback. The Tx and Rx led on our board is continuosly blinking. Would like to ask you to check on few things. If running .pof file, does it always stop at 53rd line? Does NiosII output prints using .pof continuos or stopped after 53 lines as well? If above is true, can you try to perform test with the simple normal hello world prints and see if that can continue. Below is changes we made - for max 10 ocram using xip design, you need to use the on-chip flash ram IP and the on-chip memory(RAM or ROM) IP, enable the mem init in the on-chip memory, and disable mem init in on chip flash, and use single uncompressed then generate and compile in quartus. for .hex generation, we need to use the mem_ini_gen in eclipse: https://www.intel.com/content/www/us/en/docs/programmable/683689/current/application-12184.html Build mem_init_generate on eclipse follow the link above. (successful built will created mem_init folder under project folder) Go to platform designer and on the ram editor parameter , check box for "initialize memory content" and "enable non-default initialization file". Generate hdl and close platform designer. Go to Quartus and recompile. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Yes I have a max10 development kit as well. I have duplicated the issue before on another board using 19.1 lite. Yes it works as shown in(20_1_spi_160124_nios_console). However I have to check ignore mismatched system ID and ignore mismatched system timestamp in the debug configuration as shown. If not there would be an error. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Will send the work scenario later. In the mean time, can I know if you have additional board to test the file with? Can you also test with sof + elf file manually and see the niosII terminal console if it run continuosly? Regards, Fathulnaim Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, After compilation with 20.1 lite, I got the same result(20_1_Spi_After_Compilation) that I have been getting, 2 "$HELLOABC" and stops there. I have notice some difference between the .hex file I have generated(proj_qsys_onchip_memory2_0_After_Compilation) and the one in your software folder. May I know more about your working scenario? After you power cycle the board, you are able to continuously send out "$HELLOABC"? The Tx and Rx LEDs should be blinking continuously right Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Thank you Reuben. Kindly updated to us after another compilation. Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Thank you for your help. I have tried loading your .pof file using 20.1 lite. After power cycling the board, I am able to get more signals now instead of 2 "$HELLOABC*", now I am getting 53 "$HELLOABC*LF", however it still stops and is not running in a continuous while loop as I expect. I will try to compile the file again in 20.1 lite and see whether it will work. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hope it will be working on your side. Replies: Re: NiosII booting from on-chip memory SPI issue We recompile the design using 20.1 lite. There will be ready to test folder inside which contain pof and sof file. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, I just regenerated and recompiled the project. I tested on our side and it working. Below I will attach the folder. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Thank you for the reply. Please allow me some more time to investigate. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, No I did not get the message "Generated completed with errors". Below attached is my generated message. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, During the generation of HDL on platform designer, did you also got "Generated completed with errors"? Currently trying with other version of Quartus. Will let you know any progress after this. Thank you for being patient. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, For the question, On-Chip Flash IP is not necessary. It is needed, only when booting from UFM. Thank you for the project file provided. Will look into that and find the cause. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, I've got a question relating to this document below as well. https://www.intel.com/content/www/us/en/docs/programmable/683689/current/processor-application-executes-in-place-60969.html When booting NIOS II from on-chip memory (RAM), why does the hardware design (attached below) indicate in this document to include the on-chip flash IP. Anyway I tried to use this hardware design as well in the document, but still had the same issue with my SPI. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue I see, noted. Thanks! Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Attached is the project folder. Thanks for your time. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Can I have the QSYS project file? I want to recompile the project and recapture any warning. Mem_init failures will not return as Errors, but warnings. So, it might go undetected sometimes Replies: Re: NiosII booting from on-chip memory SPI issue Hi, The start address on onchip_memory2_0.hex is based on the start address in Platform Designer system. If it starts with 2000_0000, then it is mostly likely the OCRAM in Platform Designer starts from 0x2000_0000. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Thank you for the information and file given. I will require a bit of time to investigate into it then reply back to you. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Thanks for your reply. Upon some digging into the memory browser, I have found that the onchip_memory2_0.hex always starts with 20000000? Why is that so? I have attached some images of the mem_init_generate console window and nios sbt memory browser, as well as the hex file generated by mem_init_generate and the OCRAM memory exported from nios sbt memory browser. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, It appears that the ELF file is functioning correctly, but there is an issue with the HEX file. We suspect the error might be due to one of the following: • The file being stored in the wrong RAM location. • Incorrect arguments passed to Elf2hex. • Function user mem_init generated wrong HEX file. Software abnormalities due to ELF2HEX are rare, and any references are scarce. The best approach is to review the PD address map, and the elf2hex command ran by mem_init_generate. Both the HEX file created from mem_init_generate and download as ELF in Nios II SBT are the same. Alternatively, we can read the OCRAM using Nios II SBT Memory Browser after download as ELF in Nios II SBT . And compare it with the HEX file from mem_init_generate . Replies: Re: NiosII booting from on-chip memory SPI issue Hi Fathulnaim, Sure. Thank you for your prompt response. I will await your investigation. Any questions please let me know. Regards, Reuben Goh Replies: Re: NiosII booting from on-chip memory SPI issue Hi, I will require additional time to thoroughly investigate and delve into this matter. Replies: Re: NiosII booting from on-chip memory SPI issue Hi, Greetings and welcome to Intel's forum. Please give me some time to check on this issue and will get back to you with the update. Thank you. Regards, Fathulnaim - 2023-12-19