Does the Avalon® MM Clock Crossing Bridge IP have support for the "Use synchronous reset" feature? - Does the Avalon® MM Clock Crossing Bridge IP have support for the "Use synchronous reset" feature? Description In the Intel® Quartus® Prime Pro Edition software version 18.0, the Avalon® MM Clock Crossing Bridge "Use synchronous reset" checkbox do not have any effect on the IP generation as the feature is not currently supported by the component. Resolution Do not include Avalon® MM Clock Crossing Bridge component in systems that require a synchronous reset tree. The Avalon® MM Clock Crossing Bridge "Use synchronous reset" checkbox has been removed in the Intel® Quartus® Prime Pro Edition software version 18.1. Support for synchronous resets is scheduled to be included in a future Intel® Quartus® Prime Pro Edition software release. Custom Fields values: ['novalue'] Troubleshooting FB: 573211; False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.1 18.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']