Why does I see incorrect calculation of upsets? - Why does I see incorrect calculation of upsets? Description When your design includes an Altera Advanced SEU Detection IP core, you may see incorrect calculation of upsets. While processing double-adjacent SEU, the on-chip lookup sensitivity processing, implemented by Advanced SEU Detection IP core (altera_adv_seu_detection), may calculate incorrectly the location of the second upset. Single-bit or multibit SEUs processing is not affected. Resolution This problem is scheduled to be fixed in a future version of the Quartus II software Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 15.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']