Power Analysis & the Altera Quartus Prime Software Power Analyzer - 35 Minutes This is part 1 of 2. Designing for low-power in today’s high-speed FPGA designs is more important than ever. Knowing the final design’s power usage early in the design process is necessary for making power supply design and power budgeting decisions. This training will give you the knowledge and tools you need to perform highly accurate estimates of power usage using the Quartus® Prime software. In this first part, you’ll learn how to perform an early power estimate before you've even started creating a design. You'll also learn how to set up and use the PowerPlay Power Analyzer to generate detailed reports on both static and dynamic power usage at any stage of the FPGA design flow. Course Objectives At course completion, you will be able to: Analyze power usage in all stages of the FPGA design process Understand the differences between static and dynamic power and how they are analyzed by the PowerPlay Suite of tools Perform a detailed power analysis using the PowerPlay power Analyzer Skills Required Basic understanding of the FPGA design flow and the Quartus Prime software Basic understanding of timing analysis using the TimeQuest timing analyzer Basic knowledge of performing simulations in 3rd-party EDA simulation tools If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_ODSWPWR1. FPGA_ODSWPWR1. <p>Power Analysis</p>