Why does the F-Tile DisplayPort FPGA IP Design Example fail RX link training at High Bit Rate 3 (HBR3)? - Why does the F-Tile DisplayPort FPGA IP Design Example fail RX link training at High Bit Rate 3 (HBR3)? Description Due to a problem in the F-Tile DisplayPort FPGA IP Design Example generated with the Quartus® Prime Pro Edition Software versions v23.3 and v23.4, you may observe RX link training failure at HBR3. Resolution To work around this problem in these software releases, edit the project Quartus Settings File (.qsf) with the following RxEQ parameter, then recompile the design. set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_p[3] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_n[3] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_p[2] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_n[2] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_p[1] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_n[1] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_p[0] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_ac_couple_enable=ENABLE" -to fmc_rx_n[0] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_p[3] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_n[3] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_p[2] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_n[2] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_p[1] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_n[1] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_p[0] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rx_onchip_termination=RX_ONCHIP_TERMINATION_R_2" -to fmc_rx_n[0] -entity agi_dp_demo set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_p[3] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_n[3] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_p[2] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_n[2] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_p[1] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_n[1] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_p[0] set_instance_assignment -name HSSI_PARAMETER "rxeq_dfe_data_tap_1=0" -to fmc_rx_n[0] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_p[3] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_n[3] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_p[2] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_n[2] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_p[1] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_n[1] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_p[0] set_instance_assignment -name HSSI_PARAMETER "rxeq_hf_boost=0" -to fmc_rx_n[0] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_p[3] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_n[3] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_p[2] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_n[2] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_p[1] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_n[1] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_p[0] set_instance_assignment -name HSSI_PARAMETER "rxeq_vga_gain=37" -to fmc_rx_n[0] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_p[3] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_n[3] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_p[2] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_n[2] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_p[1] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_n[1] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_p[0] set_instance_assignment -name HSSI_PARAMETER "vsr_mode=VSR_MODE_DISABLE" -to fmc_rx_n[0] This problem has been fixed starting in version 24.1 of the Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15014913762 False ['DisplayPort'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.1 23.3 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['Agilex™ 7 FPGA I-Series Dev Kit']