Arria® 10 and Cyclone® 10 PCIe Hard IP - Configurable PCIe 3.0/2.0 hard IP on Arria® 10 & Cyclone® 10 GX FPGAs with Root Port/Endpoint, Avalon-ST, Avalon-MM, and SR-IOV and DMA options. Altera, provides leadership programmable solutions that are easy-to-use and deploy in applications from the cloud to the edge, offering limitless AI possibilities. Our end-to-end broad portfolio of… Intel® Arria® 10 GX FPGA Intel® Cyclone® 10 GX FPGA Arria® 10 and Cyclone® 10 GX FPGAs include a configurable, hardened protocol stack for PCI Express* that is compliant with the PCI Express Base Specification 3.0 and PCI Express Base Specification 2.0 respectively. The hard IP provides the Avalon® Streaming (Avalon-ST) interface and can be configured for either Root Port (RP) or Endpoint (EP) modes. Complementary soft IPs are available for Single Root I/O Virtualization (SR-IOV) support and bridging to an Avalon Memory-Mapped interface (Avalon-MM) with DMA functionality. PCI Express (IP) Aerospace ASIC Proto Data Center Cloud (Public, Private, Hybrid) Data Center OEM (IHV, ISV, SI, VAR) Defense Government Industrial Medical Test Wireless Arria® 10 and Cyclone® 10 PCIe Hard IP Key Features Complete PCIe Protocol Stack in Hard IP – Full implementation of Transaction, Data Link, and Physical Layers with PIPE mode support. Offering Brief Yes No No Yes Encrypted Verilog Intel® Arria® 10 GX FPGA Intel® Cyclone® 10 GX FPGA Yes Yes Offering Brief Production a1JUi000004N5CnMAK What's Included Encrypted Verilog Source Code Ordering Information No license required Direct a1JUi000004N5CnMAK Production Acceleration / AI / Cloud Intellectual Property (IP) a1MUi00000BO8twMAD a1MUi00000BO8twMAD 2025-10-24T17:26:08.000+0000 Configurable PCIe 3.0/2.0 hard IP on Arria® 10 & Cyclone® 10 GX FPGAs with Root Port/Endpoint, Avalon-ST, Avalon-MM, and SR-IOV and DMA options. Altera Solutions