Soft Controller May Not Meet Timing When Data Reordering is Enabled - Soft Controller May Not Meet Timing When Data Reordering is Enabled Description This problem affects DDR2 and DDR3 products. This issue applies to DDR2 and DDR3 designs targeting Arria V devices, and using the soft memory controller. When the Enable Reordering option is enabled on the Controller Settings tab, the memory interface may not meet setup constraints. Resolution The workaround for this issue is to not use the Enable Reordering feature. This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 12.0 ['Arria® V FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']