Internal Error: Sub-system: ASMDD, File: /quartus/comp/asmdd/asmdd_stratixv_hd_pcs10g_rx_chnl_uint_auto_generated_asm.cpp, Line: 219 - Internal Error: Sub-system: ASMDD, File: /quartus/comp/asmdd/asmdd_stratixv_hd_pcs10g_rx_chnl_uint_auto_generated_asm.cpp, Line: 219 Description You may see the above error in the Arria® V GZ device if you are using Native PHY with 10G PCS and change the TX and RX FIFO full and empty threshold values in Quartus® Prime version 15.1. This is because the TX and RX FIFO full and empty threshold values are fixed and should not be changed in design. Resolution This is a known problem in Quartus Prime version 15.1. To work around this, you can keep the threshold values to their default. This problem will be fixed in a future version of the Quartus Prime software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 15.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']