University Self-Guided Lab: Introduction to Static Timing Analysis of Digital Circuits - Same Course in Japanese: 大学生向けワークショップ : デジタル回路のスタティック・タイミング解析入門 35 Minutes This course will teach you the fundational concepts and math behind static timing analysis. Calculate timing margins by completing paper and pencil exercises. Gain experience writing, analyzing, and correcting timing constraints using the Timing Analysis tool within the Altera® Quartus Prime Software. Course Objectives At course completion, you will be able to: Understand the concepts and arithmetic behind digital logic circuitry timing analysis Know how the maximum operating clock frequency of a digital circuit is calculated Get hands-on practice generating timing constraints and using the timing Analyzer tool to perform an analysis on an Altera® FPGA design Skills Required Basic understanding of digital logic design If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OUWTIMING. FPGA_OUWTIMING. <p>University Self-Guided Lab: Introduction to Static Timing Analysis of Digital Circuits</p>