Intel® Arria® 10 FPGA PCIe 3.0 Endpoint is not compatible with PCIe 4.0 capable system. - Intel® Arria® 10 FPGA PCIe 3.0 Endpoint is not compatible with PCIe 4.0 capable system. Description The Intel® Arria® 10 FPGA PCIe 3.0 IP core will treat 4.0 Data Link Features Exchange as unsupported DLLP type (as per the PCIe 3.0 spec), unsupported DLLP type is not being flagged as valid DLLP, so does not ungate the InitFC. When this happens, no error is reported by the Intel® Arria® 10 FPGA. This is an expected behaviour. Resolution To work around this problem, disable the Data Link Feature Exchange in PCIe 4.0 system [Base spec 4.0 chapter 7.7.4.2 Data Link Feature Capabilities Register (Offset 04h)] to be compatible with legacy hardware. This problem will not be fixed in a future release of the Intel® Quartus® Prime Software. Custom Fields values: ['novalue'] Troubleshooting FB: 557298; True ['Arria® 10 Cyclone® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 17.1 ['Arria® 10 FPGAs and SoCs', 'Arria® 10 GT FPGA', 'Arria® 10 GX FPGA', 'Arria® 10 SX FPGA'] ['novalue'] ['novalue'] ['novalue']