How can I stop the Quartus II software from merging PLLs in my design? - How can I stop the Quartus II software from merging PLLs in my design? Description You can disable PLL merging in the Quartus® II software by adding the following assignment to your .qsf file: set_global_assignment -name AUTO_MERGE_PLLS OFF This setting can be also be accessed from the Assignments Menu, by clicking on Settings -> Fitter Settings -> More Fitter Settings. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® GX FPGA', 'Arria® II FPGAs', 'Arria® V FPGAs and SoCs', 'Cyclone® FPGAs', 'Cyclone® II FPGAs', 'Cyclone® III FPGAs', 'Cyclone® IV FPGAs', 'Cyclone® V FPGAs and SoCs', 'Arria® 10 FPGAs and SoCs', 'MAX® 10 10 FPGAs', 'Stratix® FPGAs', 'Stratix® II FPGAs', 'Stratix® III FPGAs', 'Stratix® IV FPGAs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']