LVDS pin detail on Arria 10 - LVDS pin detail on Arria 10 Hi, I am using Arria 10 FPGA in one of our project. OPN: 10AX066N2F40E1HG. I see that Bank 3D is dedicated to LVDS ( picture below from HW schematic). But, my FPGA pin planner says the pin is 1.8 V(default). there is a drop down option to choose LVDS, but it was never chosen. the pin was left at 1.8V, and bit file was generated and it works fine in Hardware. I have two questions regarding this. 1) Is the fpga pin planner setting ignored and the pins are treated as differential LVDS? 2) Can the LVDS pin be used as single ended instead of differential? Thanks Replies: Re: LVDS pin detail on Arria 10 Please be informed that starting October 1st, the FPGA Forum on community.intel.com will be placed in read-only mode. You will still be able to view and access existing content, but new posts, comments, or edits will no longer be permitted during this transition period. For urgent technical support, we kindly ask that you reach out through Intel Premier Support (IPS) via your DFAE ( Altera authorised distributors ) engagement. We appreciate your patience as we prepare for the official launch of the new FPGA forum on October 14th, where posting capabilities will resume. Thank you for your continued support and understanding. Regards. Richard Tan Replies: Re: LVDS pin detail on Arria 10 Hi, Check this https://www.intel.com/content/www/us/en/docs/programmable/683461/current/i-o-and-differential-i-o-buffers-in-devices.html LVDS I/O bank—supports differential and single-ended I/O standards up to 1.8 V. So you can use for single-ended. If that IO you're using for LVDS SERDES, I don't think you can use 1.8V check this SERDES I/O Standards Support in Arria® 10 Devices https://www.intel.com/content/www/us/en/docs/programmable/683461/current/serdes-i-o-standards-support-in-devices.html Thanks, Regards, Sheng Replies: Re: LVDS pin detail on Arria 10 Hi, selected IO standard is never ignored. If it's not supported, the design won't fit. What is driven by respective inputs? Some IP, e.g. SERDES TX doesn't support other IO standards than LVDS with Arria 10 or Cyclone 10 GX. But I'm not sure about SERDES RX. Regards Frank